ADITIA, Tarigan; 						PURNAMASARI, Rita; 						SAPUTRA, Efa Maydhona.
 Improvement in the LDPC Error Correction Process Based on FPGA Implementation.
<strong>JMECS (Journal of Measurements, Electronics, Communications, and Systems)</strong>, [S.l.], v. 1, n. 1, p. A10-17, dec. 2015.
ISSN 2477-7986.
Available at: &lt;<a href="//journals.telkomuniversity.ac.id/jmecs/article/view/1476" target="_new">//journals.telkomuniversity.ac.id/jmecs/article/view/1476</a>&gt;. Date accessed: 15 may 2024.
doi: <a href="https://doi.org/10.25124/jmecs.v1i1.1476">https://doi.org/10.25124/jmecs.v1i1.1476</a>.